FIG. 1 shows a cross section side view of a prior art T-gate structure transistor 100. The T-gate structure transistor 100 has a T-shaped gate 125, which is often referred to as simply a T-gate. In general a T-gate is any device which has a narrow gate foot 65 and a relatively wider gate head 165. Sometimes the same or similar structures are referred to as Y-gates and/or mushroom gates due to their final shape. In yet another instance, a gamma-gate or asymmetric gate can be produced. A gamma-gate has a cross section similar to the Greek letter gamma. Accordingly, the terms T-gate, Y-gate, mushroom gate, gamma-gate, and asymmetric gate refer to a tiered gate structure with a narrow gate foot 65 and a relatively wider gate head 165. In this disclosure the term T-gate, the most general and widely used term to refer to such tiered gate structure devices, is intended to encompass all of these structural variations.
Most T-gate processes utilize electron beam lithography to produce short gate length devices. While gate lengths less than 100 nanometers are commonly achievable, the short height of the gate foot 65 (the distance between the surface of the substrate 110 and the bottom of the gate head 165) required to produce such short gate lengths, creates unwanted parasitics between the gate head 165 and a source 120, and between the gate head 165 and a drain 130, indicated as Cgs and Cgd, respectively. This occurs because of the aspect ratio limitation between feature size and resist thickness in electron beam lithography. Electrons undergo forward and back scattering during exposure which limit the minimum feature size to around half of the resist thickness at a 50 kV acceleration voltage. This short separation also hinders nitride coverage of the gate structure 125 during passivation.
Traditional fabrication methods of the T-gate structure 125 are performed with one or two exposure passes. In the two exposure pass method, during the first exposure, the top resist is exposed to define the gate head 165. The lower resist which will define the gate foot 65, is partially exposed in the first exposure, but not enough to develop it. The top resist is developed and a second exposure is used to define the gate foot 65. This creates a history on the lower resist layer, which can cause non-uniformities in the gate foot 65 to occur across the wafer.
In addition to non-uniformities in the gate foot 65, voids 167 and 168 will form on either side of the gate foot 65 during metal evaporation. The voids 167 and 168 extend upward between the gate foot 65 and gate head 165 and can present a reliability problem for the T-gate structure transistor 100. Also, a downward extending recess 169 will form in the top of the gate head 165 during metal evaporation. The recess 169 may also present a reliability problem for the T-gate structure transistor 100.
Once the T-gate structure transistor 100 is formed on the substrate 110, a passivation layer is typically formed on the substrate 110 around the T-gate to protect the surface of the substrate 110. For example, the passivation layer can insulate the surface of the substrate 110 from the ambient environment and prevent the surface from oxidizing. The passivation layer may be a nitride layer formed on the substrate 110 by using a plasma enhanced chemical vapor deposition process. Because the gate head 165 overhangs the gate foot 65, the passivation layer may be non-uniform under the gate head 165 around the gate foot 65. Consequently, the surface of substrate 110 under the gate head 165 is less protected, which may result in reliability and performance problems in a T-gate transistor including the T-gate. Moreover, the non-uniformity of the passivation layer around the gate foot 65 may increase the capacitance between the gate head 165 and the source 120, as well as the capacitance between the gate head 165 and the drain 130. These increases in capacitance may degrade the frequency response of the T-gate transistor.
In light of the above, there exists a need to improve passivation coverage of a substrate around the gate foot of a T-gate structure. Further, there exists a need to reduce the gate to source capacitance and the gate to drain capacitance of a T-gate structure transistor.